Canary SRAM Built in Self-test for SRAM Write VMIN Tracking

As we shrink down devices with technology scaling, process variation increases and it hinders SRAM VMIN scaling. Using peripheral assists, we can further lower the VMIN at the cost of energy and area. However, the SRAM VMIN varies with voltage, temperature and operating frequency variations, and it is hard to determine in real time. Prior work shows theoretically that canary SRAMs using reverse assist can track SRAM write VMIN. However, during manufacturing the canary SRAM can have defects that can result in an erroneous SRAM VMIN tracking. In order to check whether to use canaries to track SRAM write VMIN, we need to have a built in self-test hardware that can test if the canary SRAM with reverse assist has a distinct bit failure trend. In this paper, we propose the first built in selftest hardware for a 512b canary SRAM with reverse assists in a 130nm bulk technology. We show that this hardware can produce go-no-go testing results during production test run to decide whether to use the canary SRAM in SRAM VMIN tracking. In addition, the hardware provides debug functionality to pinpoint the issues in the canary SRAM failure trend, point by point. Index Terms — Canary SRAM BIST, CBIST, dynamic write VMIN tracking, Wordline and bitline type reverse assist.